Tape Mounting After Partial Dicing

PDBG is done by partially etching the streets while the wafer is at full thickness. Once the streets have been etched to the desired depth, the wafer is then mounted to grinding tape. Upon grinding, the dies are separated when the grinding depth reveals the etched streets. The advantage of this approach is that any frontside processes can be done without the wafer being mounted to dicing tape or a temporary carrier. As with other plasma dicing approaches, PDBG offers the benefits of high wafer area utilization and stronger die.

Tape Frames

PDBG does not use tape frames for the plasma etching step, allowing conventional wafer-handling approaches.

Wafer Level Processing

With wafer on carrier, other processes such as lithography or metallization can be done without tape frames.

Dicing Without Tape

PDOC avoids using etching systems without tape and tape frames. The wafers on the carriers are loaded using standard approaches, such as SMIF (standard mechanical interface) pods. Processes such as lithography or resist strip can be done at a wafer level without the complications of tape and tape frames. Once the wafer is diced, the die are transferred back to the dicing tape and tape frame, where they can undergo the next packaging steps.

All the benefits of plasma dicing are realized, with narrower streets, no microcracking from saws or heat-affected areas from lasers, and faster singulation times. 

Tape Frames

PDOC does not use tape frames for the plasma etching step, allowing for conventional wafer-handling approaches.

Wafer Level Processing

With wafer on carrier, other processes such as lithography or metallization can be done without tape frames.

After Grinding

With thin and ultra-thin wafers, plasma dicing is done from the front side of wafers after backside grinding, maintaining the simple process flow used with saw dicing.

Plasma Etching

Materials are etched using a chemically reactive plasma under low pressure conditions, potentially combined with ion-induced etching.

ICP Choices

Choose from two ICP reactor design approaches to build your ICP etch system: a planar ICP source, or a cylindrical ICP source.

Highly Tunable

Etch conditions can be adjusted and optimized by tuning the settings of many process parameters such as RF power, pressure, and gas flows.

No Damage

Due to the absence of an electric field near the reactor walls there is virtually no ion bombardment or wall erosion.

Ionization

Plasma is initiated by applying RF power at 13.56 MHz to the powered electrode (cathode), while the other electrode is grounded. The electric field ionizes the gas molecules, creating the plasma.

Ion Acceleration

Typically, chemically reactive species (ions) are accelerated toward the substrate (usually a silicon wafer) to remove a specific deposited material.

RF Power

Generation of reactive species in the bulk plasma (excited molecules, radicals, etc…) and the density of the charged species (ions and electrons) depend on the RF power applied.

Gas In/Gas Out

Process gases enter the chamber through the showerhead in the top electrode, and the reactor is evacuated by a vacuum pump. 

Micro-Structures

DSE is routinely used for MEMS manufacturing to create deep micro-structures with high aspect ratios.

Etching Other Materials

Besides silicon, several hard-to-etch materials like glass, quartz, silicon carbide, and lithium tantalate, appeal to designers in the MEMS and packaging industries.

Control

DSE/DRIE is possible through equipment that can achieve high density of reactive species and independent control of ion current and ion energy.

Faster and Deeper

The key differentiation between DSE/DRIE and conventional ICP-RIE, is that DSE/DRIE enables faster etch rates and the formation of deep etch structures.

The Beam

The IBE source generates plasma from a noble gas, typically argon. A set of electrically biased grids establish the ion beam energy and angular divergence of ions within the beam.

Beam Control

The ion beam strikes the substrate, removing material by physical sputtering. Endpoint control is available with secondary ion mass spectroscopy (SIMS) to monitor sputtered material species, and stop etching at specific layers.

Angle Control

A tilting and rotating substrate stage makes it possible to altern the ion angle of incidence. This affects sputtering yield and resulting topography.

Improve Profiles

Tilting and rotating the substrate during etching can substantially improve etch profiles and avoid material redeposition.

Great Alternative

This technology has long been of growing interest for academic and industrial applications as an alternative to continuous etching, and as an essential counterpart to atomic-layer deposition.

Widely Accepted

Despite its apparent simplicity, it took several decades since the discovery of the ALE mechanism for the technology to gain broad acceptance and applicability.

Self-Limited

Self-limited reaction is a key characteristic of atomic scale etching. Ideally with ALE, adsorption and desorption steps are self-limited at a maximum rate equivalent to 1 monolayer (ML) per cycle.

Materials

The materials suitable for ALE range from semiconductor and dielectric materials (Si, III-V, SiO2, Si3N4) to metals and 2D materials such as graphene, MoS2 etc.

Films

Films typically deposited by PECVD include silicon oxide, silicon nitride, silicon carbide, diamond-like carbon (DLC), and amorphous silicon.

Applications

PECVD films are found in nearly every device, serving as encapsulants, passivation layers, hard masks, and insulators. Their many other applications range from optical coatings and RF filter tuning to sacrificial layers in MEMS devices. 

Property Tuning

Film properties such as stoichiometry, refractive index, and stress can be tuned over a wide range, depending on the application. With the addition of other reactant gases, the range of film properties can be expanded and films such as fluorinated silicon dioxide (SiOF) and silicon oxycarbide (SiOC) are possible. 

Operating Regime

Typically, PECVD operates in the 1 to 2 Torr range and at temperatures between 200C and 400C. However, lower- and higher-temperature processes are possible. 

Trench Fill Application

Trenches can be filled with HDPCVD by using the bias to “drive” material forward into the feature to planarize surfaces with significant topography. Silicon dioxide and silicon nitride are dielectric materials that are commonly used in fabrication of electronic devices to isolate multiple conductive layers, capacitors, and surface passivation.

HDPCVD Compared with PECVD

HDPCVD and PECVD have different operating pressure. HDPCVD processes operate at >50 times lower pressure than PECVD. This results in needing to use 100% silane (SiH₄) to get acceptable deposition rates. Another major difference is that because of bias, substrates need to be clamped in HDPCVD.

Films

HDPCVD works well for depositing silicon dioxide (SiO₂), silicon nitride (Si_xN_y), silicon oxynitride (SiO_xN_y), silicon carbide (SiC), and amorphous silicon (α-Si), as well as diamond-like carbon (DLC). HDPCVD has also been used to make fluorocarbon films.